pyGHDL.dom.Sequential
¶
Classes
IfBranch
: ABranch
is a base-class for all branches in a if statement.ElsifBranch
: ABranch
is a base-class for all branches in a if statement.ElseBranch
: ABranch
is a base-class for all branches in a if statement.IfStatement
: ACompoundStatement
is a base-class for all compound statements.IndexedChoice
: ASequentialChoice
is a base-class for all sequential choices (in case statements).RangedChoice
: ASequentialChoice
is a base-class for all sequential choices (in case statements).Case
: ACase
is a base-class for all cases.OthersCase
: ACase
is a base-class for all cases.CaseStatement
: ACompoundStatement
is a base-class for all compound statements.ForLoopStatement
: ALoopStatement
is a base-class for all loop statements.SequentialSimpleSignalAssignment
: ASequentialStatement
is a base-class for all sequential statements.SequentialProcedureCall
: ASequentialStatement
is a base-class for all sequential statements.SequentialAssertStatement
: ASequentialStatement
is a base-class for all sequential statements.SequentialReportStatement
: ASequentialStatement
is a base-class for all sequential statements.NullStatement
: ASequentialStatement
is a base-class for all sequential statements.WaitStatement
: ASequentialStatement
is a base-class for all sequential statements.
Classes
- class pyGHDL.dom.Sequential.IfBranch(branchNode, condition, statements=None)[source]¶
Inheritance
- Parameters:
branchNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
statements (Iterable[SequentialStatement]) –
- __init__(branchNode, condition, statements=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
branchNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
statements (Iterable[SequentialStatement]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.ElsifBranch(branchNode, condition, statements=None)[source]¶
Inheritance
- Parameters:
branchNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
statements (Iterable[SequentialStatement]) –
- __init__(branchNode, condition, statements=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
branchNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
statements (Iterable[SequentialStatement]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.ElseBranch(branchNode, statements=None)[source]¶
Inheritance
- Parameters:
branchNode (Iir) –
statements (Iterable[SequentialStatement]) –
- __init__(branchNode, statements=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
branchNode (Iir) –
statements (Optional[Iterable[SequentialStatement]]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.IfStatement(ifNode, ifBranch, elsifBranches=None, elseBranch=None, label=None)[source]¶
Inheritance
- Parameters:
ifNode (Iir) –
ifBranch (IfBranch) –
elsifBranches (Iterable[ElsifBranch]) –
elseBranch (ElseBranch) –
label (str) –
- __init__(ifNode, ifBranch, elsifBranches=None, elseBranch=None, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
ifNode (Iir) –
ifBranch (IfBranch) –
elsifBranches (Optional[Iterable[ElsifBranch]]) –
elseBranch (Optional[ElseBranch]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.IndexedChoice(node, expression)[source]¶
Inheritance
- Parameters:
node (Iir) –
expression (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
- __init__(node, expression)[source]¶
Initializes a VHDL model entity.
- Parameters:
node (Iir) –
expression (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.RangedChoice(node, rng)[source]¶
Inheritance
- Parameters:
node (Iir) –
rng (Range) –
- __init__(node, rng)[source]¶
Initializes a VHDL model entity.
- Parameters:
node (Iir) –
rng (Range) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.Case(node, choices, statements=None)[source]¶
Inheritance
- Parameters:
node (Iir) –
choices (Iterable[SequentialChoice]) –
statements (Iterable[SequentialStatement]) –
- __init__(node, choices, statements=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
node (Iir) –
choices (Iterable[SequentialChoice]) –
statements (Optional[Iterable[SequentialStatement]]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.OthersCase(caseNode, statements=None)[source]¶
Inheritance
- Parameters:
caseNode (Iir) –
statements (Iterable[SequentialStatement]) –
- __init__(caseNode, statements=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
caseNode (Iir) –
statements (Optional[Iterable[SequentialStatement]]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.CaseStatement(caseNode, label, expression, cases)[source]¶
Inheritance
- Parameters:
caseNode (Iir) –
label (str) –
expression (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
cases (Iterable[SequentialCase]) –
- __init__(caseNode, label, expression, cases)[source]¶
Initializes a VHDL model entity.
- Parameters:
caseNode (Iir) –
label (str) –
expression (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
cases (Iterable[SequentialCase]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.ForLoopStatement(loopNode, loopIndex, rng, statements=None, label=None)[source]¶
Inheritance
- Parameters:
loopNode (Iir) –
loopIndex (str) –
rng (Range) –
statements (Iterable[SequentialStatement]) –
label (str) –
- __init__(loopNode, loopIndex, rng, statements=None, label=None)[source]¶
Initializes a VHDL model entity.
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.SequentialSimpleSignalAssignment(assignmentNode, target, waveform, label=None)[source]¶
Inheritance
- Parameters:
assignmentNode (Iir) –
target (Name) –
waveform (Iterable[WaveformElement]) –
label (str) –
- __init__(assignmentNode, target, waveform, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
assignmentNode (Iir) –
target (Name) –
waveform (Iterable[WaveformElement]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.SequentialProcedureCall(callNode, procedureName, parameterMappings, label=None)[source]¶
Inheritance
- Parameters:
callNode (Iir) –
procedureName (Name) –
parameterMappings (Iterable[ParameterAssociationItem]) –
label (str) –
- __init__(callNode, procedureName, parameterMappings, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
callNode (Iir) –
procedureName (Name) –
parameterMappings (Iterable[ParameterAssociationItem]) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.SequentialAssertStatement(assertNode, condition, message=None, severity=None, label=None)[source]¶
Inheritance
- Parameters:
assertNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
message (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
severity (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- __init__(assertNode, condition, message=None, severity=None, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
assertNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
message (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
severity (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.SequentialReportStatement(reportNode, message, severity=None, label=None)[source]¶
Inheritance
- Parameters:
reportNode (Iir) –
message (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
severity (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- __init__(reportNode, message, severity=None, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
reportNode (Iir) –
message (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
severity (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.NullStatement(waitNode, label=None)[source]¶
Inheritance
- Parameters:
waitNode (Iir) –
label (str) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.
- class pyGHDL.dom.Sequential.WaitStatement(waitNode, sensitivityList=None, condition=None, timeout=None, label=None)[source]¶
Inheritance
- Parameters:
waitNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
timeout (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- __init__(waitNode, sensitivityList=None, condition=None, timeout=None, label=None)[source]¶
Initializes a VHDL model entity.
- Parameters:
waitNode (Iir) –
condition (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
timeout (Union[BaseExpression, QualifiedExpression, FunctionCall, TypeConversion, Constant, ConstantSymbol, Variable, VariableSymbol, Signal, SignalSymbol, Literal]) –
label (str) –
- property Parent: ModelEntity¶
Returns a reference to the parent entity.
- Return type:
- Returns:
Parent entity.
- _parent: ModelEntity¶
Reference to a parent entity in the model.